In recent years, a serial ATA interface is adopted as an interface for connecting a host computer (e.g., personal computer) and an information storage device such as a hard disc drive or an optical drive (e.g., DVD (Digital Versatile Disc) drive). The serial ATA can realize a higher data transfer speed than a parallel ATA. However, a high-speed clock (e.g., 750 MHz) is used in the serial ATA, which makes the power consumption in the serial ATA higher than that in the parallel ATA.
Thus, in the serial ATA specification, three power consumption modes of PHYRDY, Partial and Slumber are defined so as to realize a power saving function. Partial and Slumber are each a “power saving mode” in which the power of an interface circuit is turned off to disable communication, and PHYRDY is a steady-state in which communication is enabled. When communication needs to be started in the power saving mode, it is necessary to set back the power consumption mode from the power saving mode to PHYRDY state, so that the recovery time to PHYRDY state occurs to cause an operational delay. Further, the serial ATA specification has a feature that, in PHYRDY state, a host computer and an information storage device connected via the serial ATA transmit high frequency signals to each other even while they do not perform data exchange. That is, in PHYRDY state, a high power is always consumed irrespective of presence/absence of data to be exchanged.
FIG. 1 shows the outline of the power consumption mode of the serial ATA interface. As shown in FIG. 1, the power consumption becomes lower in order of PHYRDY state, Partial state, and Slumber state. The Partial state and Slumber state correspond to the abovementioned “power saving mode”, and the time required for transition from the power saving mode to PHYRDY state is larger from the Slumber state than from the Partial state. More specifically, the time required for transition from the Partial state to PHYRDY state is up to 10 μsec, and time required for transition from the Slumber state to PHYRDY state is up to 10 msec. As described above, the power saving mode can include “low power saving mode” and “high power saving mode” depending on the number of turn-off interface circuits. The “high power saving mode” has higher power saving effect than the “low power saving mode”, while it requires more time for transition to a steady-state in which communication is enabled than the “low power saving mode”.
Here, a transition method to the power saving mode in the serial ATA interface in the case where a host computer and an optical drive are connected to each other by the serial ATA interface will be described. The following process is carried out in a conventional transition method. That is, when a state where no command is issued from the host computer to optical drive continues for a certain time period (e.g., 500 msec) in the PHYRDY state, the optical drive transmits a request (message for requesting transition to the Partial state) to the host computer, and the power consumption mode shifts to the Partial state. After that, when a state where no command is issued from the host computer to optical drive continues for a certain time period (e.g., 2,500 msec) in this Partial state, the optical drive transmits a request (message for requesting transition to the Slumber state) to the host computer, and the power consumption mode shifts to the Slumber state.
As a conventional art document relating to such a conventional technique, the following patent document discloses a technique for realizing the power saving inside a disc storage device.    Patent Document 1: Jpn. Pat. Appln. Laid-Open Publication No. 2001-325048